我试图用两个按钮增加和减少 . 算法顺利，但我有一点问题 . 据说我正在递增，当我尝试递减累加器时，它再次递增，并且仅在此之后它开始递减 . 如果我先尝试递减，也一样 . 如果有人帮助我，我将非常感激 .
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.std_logic_unsigned.all;
entity my_offset_controller is
port(clk : in std_logic;
input : in std_logic_vector(15 downto 0);
add_button : in std_logic;
sub_button : in std_logic;
output_res : out std_logic_vector(15 downto 0)
);
end my_offset_controller;
architecture Behavioral of my_offset_controller is
signal buttonState_up : std_logic:='0';
signal accumulator : std_logic_vector(15 downto 0);
signal lastButtonState_up : std_logic:='0';
signal buttonState_down : std_logic:='0';
signal lastButtonState_down : std_logic:='0';
signal buttonPushCounter : integer range 0 to 512 :=0;
process(clk)
begin
if rising_edge(clk) then
buttonState_up <= add_button;
buttonState_down <= sub_button;
if (buttonState_up /= lastButtonState_up) then
if (buttonState_up ='1') then
buttonPushCounter <= buttonPushCounter + 1;
accumulator <= std_logic_vector(to_unsigned(buttonPushCounter,accumulator'length));
end if;
lastButtonState_up <= buttonState_up;
elsif (buttonState_down /= lastButtonState_down) then
if (buttonState_down ='1') then
buttonPushCounter <= buttonPushCounter - 1;
accumulator <= std_logic_vector(to_unsigned(buttonPushCounter,accumulator'length));
end if;
lastButtonState_down <= buttonState_down;
end if;
end if;
end process;
output_res<= accumulator + input ;
这个特别模块用于控制我在vga屏幕上绘制的信号的偏移量 .
1 回答
没有更多信息，很难帮助你 . 您应该提供一个带有计时码表的测试平台，以便更轻松 . 然而，通过查看您的过程，我会说问题来自以下几行：
你在那里做的是在更新
accumulator的同时增加buttonPushCounter. 这样buttonPushCounter将始终根据最后一个事件移动1或-1 .我建议的是在每个时钟周期更新
accumulator而不是每次发生事件 . 例如这样：